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march 2012 ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) fsq0370rna, fsq0370rla green mode fairchild power switch (fps?) features ? internal avalanche rugged 700v sensefet ? consumes only 0.8w at 230v ac & 0.5w load with burst-mode operation ? precision fixed oper ating frequency: 100khz ? internal startup circuit and built-in soft-start ? pulse-by-pulse current limiting, auto-restart mode ? over-voltage protection (ovp), overload protection (olp), internal thermal shutdown function (tsd) ? under-voltage lockout (uvlo) ? low operating current: 3ma ? adjustable peak current limit applications ? auxiliary power supply for pc and server ? smps for vcr, svr, stb, dvd, and dvcd player ? printer, facsimile, and scanner ? adapter for camcorder description the fsq0370 consists of an integrated current mode pulse width modulator (pwm) and an avalanche rugged 700v sensefet. it is specifically designed for high- performance offline switched mode power supplies (smps) with minimal external components. the integrated pwm controller f eatures include: a fixed- frequency generating oscillator, under-voltage lockout (uvlo) protection, leading-edge blanking (leb), an optimized gate turn-on / turn-off driver, thermal shutdown (tsd) protec tion, and temperature- compensated precision current sources for loop compensation and fault protection circuitry. compared to a discrete mo sfet and controller or rcc switching converter solution, the fsq0370 reduces total component count, design size, and weight while increasing efficiency, productivity, and system reliability. these devices provide a bas ic platform that is well suited for the design of cost-e ffective flyback converters, such as in pc auxiliary power supplies. related application notes ? an-4134 ? design guidelines for off-line forward converters using fairchild power switch (fps?) ? an-4137 ? design guidelines for offline flyback converters using fairchild power switch (fps?) ? an-4141 ? troubleshooting and design tips for fairchild power switch (fps?) flyback applications ? an-4147 ? design guidelines for rcd snubber of flyback converters ordering information part number package marking code bv dss f osc r ds(on)(max) fsq0370rna 8-lead, dual inline package (dip) q0370ra 700v 100khz 4.75 fsq0370rla 8-lead, lsop
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 2 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) application circuit drain source vstr vfb vcc pwm ac in dc out ipk figure 1. typical flyback application table 1. output power table (1) product 230v ac 15% (2) 85-265v ac adapter (3) open frame (4) adapter (3) open frame (4) fsq0370rna 20w 27w 13w 19w fsq0370rla notes: 1. the maximum output power can be limited by junction temperature. 2. 230v ac or 100/115v ac with doubler. 3. typical continuous power in a non-v entilated enclosed adapter with sufficient drain pattern as a heat sink at 50 c ambient. 4. maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sink at 50 c ambient. internal block diagram figure 2. functional block diagram
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 3 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) pin assignments figure 3. pin configuration (top view) pin definitions pin# name description 1 gnd sensefet source terminal on the primary side and internal control ground. 2 vcc positive supply voltage input. although connec ted to an auxiliary transformer winding, current is supplied from pin 5 (vstr) via an internal switch during startup (see figure 2) . it is not until v cc reaches the uvlo upper threshold (12v ) that the internal startup switch opens and device power is supplied vi a the auxiliary transformer winding. 3 vfb the feedback voltage pin is the non-inverting input to the pwm comparator. it has a 0.9ma current source connected internally, wh ile a capacitor and optocoupler are typically connected externally. a feedback voltage of 6v triggers overload prot ection (olp). there is a delay while charging external capacitor c fb from 3v to 6v using an internal 5a current source. this delay prevents false tr iggering under transient conditions, but allows the protection mechanism to oper ate in true overload conditions. 4 ipk this pin adjusts the peak current limit of the sensefet. the 0.9ma feedback current source is diverted to the paralle l combination of an internal 2.8k resistor and any external resistor to gnd on this pin. this determines the peak current limit. if this pin is tied to vcc or left floating, the typical peak current limit is 1.1a. 5 vstr this pin is connected to the rectified ac line vo ltage source. at startup, the internal switch supplies internal bias and charges an exter nal storage capacitor placed between the vcc pin and ground. once v cc reaches 12v, the internal switch is opened. 6, 7, 8 drain the drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 700v. minimizing the length of the trace connecting these pins to the transfo rmer decreases leakage inductance.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 4 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stre sses above the recommended operating conditi ons may affect device reliability. the absolute maximum ratings are stress ratings only. t a =25c, unless otherwise specified. symbol parameter min. max. unit v drain drain pin voltage 700 v v str vstr pin voltage 700 v i dm drain current pulsed (5) 12 a e as single pulsed avalanche energy (6) 230 mj v cc supply voltage 20 v v fb feedback voltage range -0.3 v cc v p d total power dissipation 1.5 w t j recommended operating junction temper ature -40 internally limited c t a operating ambient temperature -40 +85 c t stg storage temperature -55 +150 c notes: 5. non-repetitive rating: pulse-width lim ited by maximum junction temperature. 6. l=51mh, starting t j =25c. thermal impedance symbol parameter value unit ja junction-to-ambient thermal resistance (7) 80 c/w jc junction-to-case thermal resistance (8) 20 jt junction-to-top thermal resistance (9) 35 notes: 7. free-standing with no heat-s ink, without copper clad. 8. measured on the drain pin, cl ose to the plastic interface. 9. measured on the pa ckage top surface.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 5 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) electrical characteristics t a =25 c unless otherwise specified. symbol parameter condition min. typ. max. unit sensefet section (10) i dss zero-gate-voltage drain current v ds =700v, v gs =0v 50 a v ds =560v, v gs =0v, t c =125 c 200 r ds(on) drain-source on-state resistance (10) v gs =10v, i d =0.5a 4.00 4.75 ? c iss input capacitance v gs =0v, v ds =25v, f=1mhz 315 pf c oss output capacitance v gs =0v, v ds =25v, f=1mhz 47 pf c rss reverse transfer capacitance v gs =0v, v ds =25v, f=1mhz 9 pf t d(on) turn-on delay v dd =350v, i d =1a 11.2 ns t r rise time v dd =350v, i d =1a 34 ns t d(off) turn-off delay v dd =350v, i d =1a 28.2 ns t f fall time v dd =350v, i d =1a 32 ns control section f osc switching frequency 92 100 108 khz f osc switching frequency variation (11) -25 c < t j < 85 c 5 10 % d max maximum duty cycle measured at 0.1 x v ds 55 60 650 % d min minimum duty cycle 0 0 0 % v start uvlo threshold voltage v fb =gnd 11 12 13 v v stop 7 8 9 i fb feedback source current v fb =gnd 0.7 0.9 1.1 ma t s/s internal soft-start time (11) v fb =4v 10 ms burst-mode section v burh burst-mode voltage t j =25c 0.5 0.6 07 v v burl 0.3 0.4 0.5 v v bur(hys) 100 200 300 mv protection section i lim peak current limit di/d t=240ma/s 0.97 1.10 1.23 a t cld current limit delay (11) 500 ns t sd thermal shutdown temperature (11) 125 140 c v sd shutdown feedback volt age 5.5 6.0 6.5 v v ovp over-voltage protection 18 19 v i delay shutdown delay current v fb =4v 3.5 5.0 6.5 a t leb leading-edge blanking time (11) 200 ns total device section i op operating supply current (control part only) v cc =14v 1 3 5 ma i ch startup charging current v cc =0v 0.70 0.85 1.00 ma v str v str supply voltage v cc =0v 24 v notes: 10. pulse test: pulse width 300 s, duty 2%. 11. these parameters, al though guaranteed, are not 100% tested in production.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 6 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) typical performance characteristics characteristic graphs are normalized at t a =25c. figure 4. operating frequency (f osc ) vs. t a figure 5. over-voltage protection (v ovp ) vs. t a figure 6. maximum duty cycle (d max ) vs. t a figure 7. operating supply current (i op ) vs. t a figure 8. start threshold voltage (v start ) vs. t a figure 9. stop threshold voltage(v stop ) vs. t a
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 7 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) typical performance characteristics characteristic graphs are normalized at t a =25c. figure 10. feedback source current (i fb ) vs. t a figure 11. startup charging current (i ch ) vs. t a figure 12. peak current limit (i lim ) vs. t a
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 8 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) functional description 1. startup : in previous generations of fairchild power switches (fps?), the vstr pin required an external resistor to the dc input volt age line. in this generation, the startup resistor is r eplaced by an internal high- voltage current source and a sw itch that shuts off 10ms after the v cc supply voltage goes above 12v. the source turns back on if v cc drops below 8v. figure 13. startup circuit 2. feedback control : the 700v fps series employs current mode control, as shown in figure 14. an optocoupler (such as the h11a817a) and shunt regulator (such as the ka 431) are typically used to implement the feedback net work. comparing the feedback voltage with the voltage across the r sense resistor of sensefet, plus an offset voltage, makes it possible to control the swit ching duty cycle. when the regulator reference pin vo ltage exceeds the internal reference voltage of 2.5v; the optocoupler led current increases, feedback voltage v fb is pulled down, and the duty cycle is reduced. this typically occurs when the input voltage increases or the output load decreases. figure 14. pulse width modulation (pwm) circuit 3. leading-edge blanking (leb): when the internal sensefet is turned on; t he primary-side capacitance and secondary-side rectifier diode reverse recovery typically cause a high current spike through the sensefet. excessive voltage across the r sense resistor leads to incorrect feedback operation in the current mode pwm control. to counter this effect, the fps employs a leading-edge blanking (leb) circuit to inhibit the pwm comparator for a short time (t leb ) after the sensefet is turned on. 4. protection circuits: the fps protective functions include overload protecti on (olp), over-voltage protection (ovp), under-voltage lockout (uvlo), and thermal shutdown (tsd). because these protection circuits are fully integrated in side the ic without external components, reliability is im proved without increasing cost. once a fault condition occurs, switching is terminated and the sensefet remains off. this causes v cc to fall. when v cc reaches the uv lo stop voltage, v stop (typically 8v); the pr otection is reset and the internal high-voltage current source charges the v cc capacitor via the vstr pin. when v cc reaches the uvlo start voltage, v start (typically 12v); the fps resumes normal operation. in this manner, the auto-restart can alternately enable and disabl e the switching of the power sensefet until the faul t condition is eliminated. 4.1 overload protection (olp): overload is defined as the load current exceeding a pre-set level due to an unexpected event. in this situat ion, the protection circuit should be activated to prot ect the smps. however, even when the smps is operating normally, the overload protection (olp) circuit can be activated during the load transition. to avoid this undesired operation, the olp circuit is designed to be activated after a specified time to determine whether it is a transient situation or a tr ue overload situation. in conjunction with the ipk curr ent limit pin (if used), the current mode feedback path woul d limit the current in the sensefet when the maximum pwm duty cycle is attained. if the output c onsumes more than this maximum power, the output voltage (v o ) decreases below its nominal voltage. this reduces the current through the optocoupler led, which also reduces the optocoupler transistor curr ent, thus increasing the feedback voltage (v fb ). if v fb exceeds 3v, the feedback input diode is blocked and the 5a current source (i delay ) starts to slowly charge c fb up to v cc . in this condition, v fb increases until it reaches 6v, when the switching operation is terminated (as shown in figure 15). the shutdown delay s the time required to charge c fb from 3v to 6v with 5a current source. figure 15. overload protection (olp) v fb t 3v 6v overload protection t 12 = c fb t 1 t 2 v t v v t v a i i t v t v c t d ela y d ela y f b 6 ) ( , 3 ) ( , 5 ; ) ( ) ( 2 1 1 2 12 = = = ? = v in,dc vst r v cc 10ms afte r v cc 12v uvlo of f v cc <8v uvlo on i str j-fet i ch 3 osc v cc v c c 5a 0.9ma v sd r 2.5 r gate drive r olp d1 d2 v fb vfb 431 c fb v o + - v fb,in
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 9 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) 4.2 thermal shutdown (tsd): the sensefet and the control ic are integrated, ma king it easier for the control ic to detect the temperatur e of the sensefet. if the temperature exceeds approximately 140 c, thermal shutdown is activated. 4.3 over-voltage protection (ovp): in the event of a malfunction in the secondary-side feedback circuit or an open feedback loop caused by a soldering defect, the current through the optocoupl er transistor becomes almost zero (refer to figure 14). then, v fb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the smps until the overload protection is activated. because excess energy is provided to the output, the output voltage may exceed the ra ted voltage before the overload protection is acti vated, resulting in the breakdown of the devices in the secondary side. to prevent this situation, an over-voltage protection (ovp) circuit is employed. in general, v cc is proportional to the output voltage and the fps uses v cc instead of directly monitoring the output voltage. if v cc exceeds 19v, the ovp circuit is activated, te rminating switching. to avoid undesired activation of ovp during normal operation, v cc should be designed to be below 19v. 5. soft-start : the fps internal soft-start circuit slowly increases the sensefet current after startup, as shown in figure 16. the typical soft-start time is 10ms, where progressive increments of the sensefet current are allowed during the startup phas e. the pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. the voltage on the output capacitors is pr ogressively increased to smoothly establish the requi red output voltage. this helps to prevent transformer saturation and reduces the stress on the secondary diode during startup. drain gnd r sense #6,7,8 #1 i lim 5v figure 16. soft-start function 6. burst operation: to minimize power dissipation in standby mode, the fps ent ers burst mode. feedback voltage decreases as the l oad decreases and, as shown in figure 17, the device autom atically enters burst mode when the feedback voltage drops below v burh (typically 600mv). switching continues until the feedback voltage drops below v burl (typically 400mv). at this point, switching stops and the output voltage starts to drop at a rate dependent on the standby curr ent load. this causes the feedback voltage to rise. once it passes v burh , switching resumes. the feedback voltage then falls and the process is repeated. bu rst mode alternately enables and disables switching of the sensefet and reduces switching loss in standby mode. v burh switching off current waveform burst operation normal operation v fb v burl switching off burst operation figure 17. burst operation function 7. adjusting peak current limit: as shown in figure 18, a combined 2.8k internal resistance is connected to the non-inverting lead on the pwm comparator. an external resistance of r x on the current limit pin forms a parallel resistance with the 2.8k when the internal diodes are biased by the main current source of 900a. figure 18. peak current limit adjustment for example, fsq0370 has a typical sensefet peak current limit (i lim ) of 1.1a. i lim can be adjusted to 0.6a by inserting r x between the ipk pin and the ground. the value of the r x can be estimated by: 1.1a: 0.6a = 2.8k : xk , (1) x = r x || 2.8k . (2) where x represents the resistan ce of the parallel network. 3 v cc v cc i delay i fb 2 k vfb pwm comparato r 4 ip 0.8k rx sensefet current sense 900a 5a
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 10 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) application information reducing audible noise switching mode power converters have electronic and magnetic components that generate audible noises when the operating frequency is in the range of 20~20,000hz. even though t hey operate above 20khz, they can crease noise, dependi ng on the load condition. three methods of reducing noise are discussed below: glue or varnish the most common method of reducing audible noise includes using glue or varnish to tighten magnetic components. the motion of core, bobbin, and coil as well as the chattering or m agnetostriction of core can cause the transformer to produce audible noise. the use of rigid glue and varnish reduces the transformer noise. glue or varnish can also crack the core because sudden changes in the ambient temperature cause the core and the glue to expand or shrink in a different ratio according to the temperature. ceramic capacitor using a film capacitor instead of a ceramic capacitor as a snubber capacitor is another noise reduction solution. some dielectric materials show a piezoelectric effect, depending on the electric fiel d intensity. a snubber capacitor can become one of the most significant sources of audible noise. anot her possibility is to use a zener clamp circuit instead of an rcd snubber for higher efficiency as well as lower audible noise. adjusting sound frequency moving the fundamental fr equency of noise out of 2~4khz range is a third me thod. generally, humans are more sensitive to noise in the range of 2~4khz. when the fundamental frequenc y of noise is located in this range, the noise sounds louder though the noise intensity level is identical. refer to figure 19. if burst mode is suspected as a source of noise, this method may be helpful. if the frequency of burst mode operation lies in the range of 2~4khz, adjusting the feedback loop can shift the burst operation frequency. to reduce burst operati on frequency, increase a feedback gain capacitor (c f ), optocoupler supply resistor (r d ), and feedback capacitor (c b ) and decrease a feedback gain resistor (r f ) as shown in figure 20. figure 19. equal loudness curves figure 20. typical feedback network of fps? reference materials an-4134 ? design guidelines for offline forward converters using fairchild power switch (fps?) an-4137 ? design guidelines for offline flyback converters using fairchild power switch (fps?) an-4140 ? transformer design consideration for offline flyback converters using fairchild power switch (fps?) an-4141 ? troubleshooting and design tips for fairchild power switch (fps?) flyback applications an-4147 ? design guidelines for rcd snubber of flyback converters an-4148 ? audible noise reduction techniques for fps applications
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 11 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) typical application circuit application output power input volt age output voltage (maximum current) pc auxiliary power supply (using fsq0270rna) 15w universal input (85-264v ac ) 5v (3a) features ? high efficiency (>78% at 115v ac and 230v ac input) ? low standby mode power c onsumption (<0.8w at 230v ac input and 0.5w load) ? enhanced system reliability through various protection functions ? low emi through frequency modulation ? internal soft-start: 10ms ? line uvlo function can be achieved using external components key design notes ? the delay for overload protection is designed to be about 30ms with c8 of 47nf. if faster/slower triggering of olp is required, c8 can be changed to a smaller or larger value (eg. 100nf for 60ms). ? zp1, dl1, rl1, rl2, rl3, rl4, rl5, rl7, ql1, ql2, and cl9 build a line under-voltage lockout block (uvlo). the zener voltage of zp1 determines the input voltage that turns the fps on. rl5 and dl1 provide a reference voltage from v cc . if the input voltage divided by rl1, rl2, and rl4 is lower than the zener volt age of dl1; ql1, and ql2 turn on and pull v fb down to ground. ? an evaluation board and corresponding test report can be provided. contact a fairchild representative.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 12 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) schematic figure 21. demonstration circuit
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 13 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) transformer ee2229 n 5v n a 1 2 3 4 5 6, 7 9, 10 np/2 np/2 figure 22. transformer schematic diagram table 2. winding specification no. pin (s f) wire turns winding method n p /2 3 2 0.3 x 1 72 solenoid winding insulation: polyester tape t = 0.025mm, 1-layer n a 4 5 0.25 x 2 22 solenoid winding insulation: polyester tape t = 0.0250mm, 2-layer n 5v 6, 7 9, 10 0.65 x 2 8 solenoid winding insulation: polyester tape t = 0.025mm, 2-layer n p /2 2 1 0.3 x 1 72 solenoid winding insulation: polyester tape t = 0.025mm, 2-layer table 3. electrical characteristics pin specification remarks inductance 1 - 3 1.20m h 5% 100khz, 1v leakage 1 - 3 <30h maximum short all other pins core & bobbin ? core: eer2229 ( pl-7, 37.2mm 2 ) ? bobbin: be2229
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 14 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) table 4. demonstration board part list part number value quantity description (manufacturer) c6, c8 47nf 2 ceramic capacitor c1 2.2nf (1kv) 1 ac ceramic capacitor(x1 & y1) c10 1nf (200v) 1 mylar capacitor cs1 1.5nf (50v) 1 smd ceramic capacitor c2, c3 22f (400v) 2 low impedance electrolytic capac itor kmx series (samyoung electronics) c4, c9 1000f (16v) 2 low esr electrolytic capacitor nxc series (samyoung electronics) c5 470f (10v) 1 low esr electrolytic capacitor nxc series (samyoung electronics) c7 47f (25v) 1 general electrolytic capacitor cl9 10f (50v) 1 general electrolytic capacitor l1 330h 1 inductor l2 1h 1 inductor r6 2.4 (1w) 1 fusible resistor j1, j2, j4, l3 0 4 jumper r2 4.7k ? 1 resistor r3 560 ? 1 resistor r4 100 ? 1 resistor r5 1.25k ? 1 resistor r11 1.2k ? 1 resistor r9 10k ? 1 resistor r10 2 ? 1 resistor r14 30 ? 1 resistor rl3 1k ? 1 resistor rl1, rl2 1m ? 2 resistor rl4 120k ? 1 resistor rl5 30k ? 1 resistor rl7 40k ? 1 resistor rs1 9 ? 1 resistor zr1 80 ? 1 smd resistor u1 fod817a 1 ic (fairchild semiconductor) u2 tl431 1 ic (fairchild semiconductor) u3 fsq0270rna 1 ic (fairchild semiconductor) ql1 2n2907 1 ic (fairchild semiconductor) ql2 2n2222 1 ic (fairchild semiconductor) d2, d3, d4, d5, d6, ds1 1n4007 6 diode (fairchild semiconductor) d1 sb540 1 schottky diode (fairchild semiconductor) zd1 1n4745 1 zener diode (fairchild semiconductor) dl1 1n5233 1 zener diode (fairchild semiconductor) zp1 82v (1w) 1 zener diode (fairchild semiconductor) zds1 p6ke180a 1 tvs (fairchild semiconductor)
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 15 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) layout figure 23. top image of pcb figure 24. bottom of image of pcb
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 16 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) package dimensions c 7 typ 7 typ .430 max [10.92] b a .400 .373 [ 10.15 9.46 ] .250.005 [6.350.13] .036 [0.9 typ] .070 .045 [ 1.78 1.14 ] .100 [2.54] .300 [7.62] .060 max [1.52] .310.010 [7.870.25] .130.005 [3.30.13] .210 max [5.33] .140 .125 [ 3.55 3.17 ] .015 min [0.38] .021 .015 [ 0.53 0.37 ] .010 +.005 -.000 [ 0.254 +0.127 -0.000 ] pin #1 pin #1 (.032) [r0.813] (.092) [?2.337] top view option 1 top view option 2 .001[.025] c n08erevg c. does not include mold flash or protrusions. dambar protrusions shall not exceed d. does not include dambar protrusions. b. controling dimensions are in inches a. conforms to jedec registration ms-001, mold flash or protrusions shall not exceed variations ba e. dimensioning and tolerancing notes: reference dimensions are in millimeters .010 inches or 0.25mm. .010 inches or 0.25mm. per asme y14.5m-1994. figure 25. 8-lead, dual inline package (dip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner wit hout notice. please note the revision and/or dat e on the drawing and contact a fairchild semic onductor representative to verify or obtain th e most recent revision. package specifications do not expand the terms of fairchild?s worldwide te rms and conditions, specifica lly the warranty therein , which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most re cent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 17 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?) package dimensions (continued) mkt-mlsop08areva figure 26. 8-lead, mlsop package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner wit hout notice. please note the revision and/or dat e on the drawing and contact a fairchild semic onductor representative to verify or obtain th e most recent revision. package specifications do not expand the terms of fairchild?s worldwide te rms and conditions, specifica lly the warranty therein , which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most re cent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fsq0370rna / fsq0370rla ? rev. 1.0.2 18 fsq0370rna / fsq0370rla ? green mode fairchild power switch (fps?)

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